Neutronix announced today its participation in the 21st Annual IMAPS Device Packaging Conference (DPC 2025), a premier international forum for the microelectronics packaging industry. The event will take place from March 3-6, 2025, in Phoenix, Arizona, with Neutronix exhibiting at Booth 207.
The conference gathers leading experts to address the most pressing challenges in advanced packaging, including 2.5D/3D integration, Fan-Out Wafer-Level Packaging (FO-WLP), and heterogeneous integration. Neutronix will use this platform to demonstrate how its neutron-based material analysis and modification technologies are critical for enabling next-generation device performance and reliability.
At Booth 207, the Neutronix team will highlight solutions for non-destructive testing of through-silicon vias (TSVs), interface delamination analysis, and precise material characterization within complex, stacked architectures. These capabilities are essential for improving yield and ensuring structural integrity in today’s most advanced packages.
March 4: 10:00 AM – 6:30 PM
March 5: 10:30 AM – 4:30 PM
For a detailed look at how Neutronix is solving the industry’s toughest packaging challenges, visit us at Booth 207 from March 4-5.
